1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device including a voltage converting circuit or a voltage down converter (VDC) receiving an externally supplied external power supply voltage and converting the voltage to an internal power supply voltage lower than the external power supply voltage, and, more particularly, to a structure of a voltage converting circuit which allows control of current drivability in accordance with operational frequency.
2. Description of the Background Art
Recently, operational voltage for LSI memories has been made lower and lower. Especially, it has been strongly demanded that transistors in semiconductor integrated circuit devices such as represented by LSI memories operate at a voltage lower than the externally applied power supply voltage. The operational voltage is made lower mainly to reduce power consumption of the LSI memory and to ensure reliability of the transistors which are made smaller and smaller.
In a DRAM (Dynamic Random Access Memory) in particular, lowering of the operational voltage is of critical importance to ensure reliability of capacitor dielectric film, serving as a charge storage portion in the memory cell.
Under the circumstances, upper limit of the power supply voltage for driving internal elements of semiconductor integrated circuit devices has been made lower with respect to an external power supply voltage used in the overall system, generation by generation of development.
In order to meet the demand, a voltage converting circuit receiving an external power supply voltage supplied from an external power supply for generating a stable internal power supply voltage in the semiconductor integrated circuit device has been provided.
FIG. 11 is a schematic block diagram showing a general structure of a conventional voltage converting circuit.
Referring to FIG. 11, voltage converting circuit 10 receives an external power supply voltage (hereinafter referred to as Ext. Vcc) from an external power supply line 70, and outputs a converted internal power supply voltage (hereinafter refer to as Int. Vcc) to an internal power supply line 80. Internal power supply line 80 supplies Int. Vcc to peripheral circuitry 21, an array control circuit 22 and so on.
Voltage converting circuit 10 includes a reference voltage generating unit 11 for generating a reference voltage (hereinafter referred to as Vref) As a reference value for the level of Int. Vcc and a voltage lowering unit 12 for converting Ext. Vcc to Int. Vcc based on Vref.
FIG. 12 is a circuit diagram of voltage converting circuit 2000 of a conventional structure including a plurality of voltage lowering units.
Referring to FIG. 12, voltage converting circuit 2000 includes, as the voltage lowering unit 12, an active voltage down converter 400 (hereinafter referred to as active VDC) and a standby voltage down converter 410 (hereinafter referred to as standby VDC). Further, the voltage converting circuit 2000 includes a voltage dividing circuit 420 for dividing the voltage Int. Vcc and feeding a voltage Vi' back to the active VDC 400 and the standby VDC 410. Further, an internal power supply line 440 supplies load current to internal circuits (not shown).
The operation of active VDC 400 will be described.
Active VDC 400 includes transistors 401 to 404 constituting a current mirror type differential amplifier 405, a current control transistor 406 controlling driving current for transistors 401 to 404, and a P type driver transistor 407 connected between an external power supply line 430 and internal power supply line 440.
Differential amplifier 405 receives Vref at the gate of transistor 401, receives the voltage Vi' which is the voltage Int. Vcc divided by voltage dividing circuit 420 at the gate of transistor 402, amplifies a difference between Vref. and Vi', and outputs the amplified difference to the gate of driver transistor 407.
When Vi' is lower than Vref., that is, when the voltage level of Int. Vcc is lower than a desired level, differential amplifier 405 outputs a negative voltage which corresponds to the amplified voltage difference between the two, to the gate of driver transistor 407. At this time, driver transistor 407 supplies a current which corresponds to the drop of the gate voltage, from external power supply line 430 to internal power supply line 440. In this manner, the voltage Int. Vcc is recovered.
When Vi' is approximately equal to Vref., that is, when Int. Vcc is at the desired level, driver transistor 407 is rendered non-conductive by differential amplifier 405, and therefore current is not supplied to internal power supply line 440.
By the above described operation, Int. Vcc is kept at a constant desired level.
Actually, however, the series of operation of feeding back the variation of Int. Vcc, amplifying the difference by differential amplifier 405, changing the gate voltage of driver transistor 407 and supplying current to internal power supply line 440 results in a time delay.
Accordingly, the level of Int. Vcc unavoidably involves transitional fluctuation such as an undershoot or an overshoot.
In order to suppress such fluctuation, it is necessary to improve response of differential amplifier 405 and to enhance current drivability of the VDC. More specifically, it is necessary to enlarge driving current of transistors 401 to 404 constituting differential amplifier 405.
Larger driving current of the transistor, however, means increased power consumption.
Load current consumed in internal circuits differ considerably dependent on whether the semiconductor integrated circuit device is in operable state (hereinafter referred to as active state) or not (hereinafter refer to as standby state).
Accordingly, in the active state where load current is large, VDC must have high current drivability to stabilize Int. Vcc, whereas in the standby state where Int. Vcc is less susceptible to fluctuation, VDC may have only a small current drivability.
In view of the foregoing, standby VDC 410 is required to attain both superior follow up on the fluctuation of Int. Vcc and reduced power consumption. Basic structure and operation of standby VDC 410 are the same as those of active VDC.
In standby VDC 410, current control transistor 416 operates in a linear region so as to supply a constant small current to transistors 411 to 414 constituting differential amplifier 415.
In active VDC 400, current control transistor 406 receives at its gate an activating signal .phi. which assumes "H" level when the device is activated and assumes "L" level at the time of standby, and operates in a saturation region so that it is rendered conductive only in the active state and non-conductive in the standby state.
Consequently, the active VDC operates with its current drivability enlarged only when the device is activated.
As described above, by providing a standby VDC having small current drivability and not consuming much current with a differential amplifier having small driving current, and an active VDC having large current drivability with a differential amplifier having large driving current arranged parallel to each other and by operating the active VDC only when necessary, it is possible to provide a voltage converting circuit having superior response to fluctuation of the voltage Int. Vcc in the active state.
The voltage converting circuit having such a structure is described, for example, in Ultra LSI Memory, Kiyoo Ito, BAIFUKAN, pp. 307-310, 1995.
As the speed of operation of the device has been increased, however, the problem of response of the voltage converting circuit comes to have higher importance.
In the semiconductor integrated circuit device, every time an external clock signal in accordance with an operational frequency is applied, operation such as data writing or reading takes place, and therefore load current in the active state changes with operational frequency.
With ever increasing speed of operation of the device, it has become more common that the semiconductor integrated circuit device operate under wider range of operational frequency. Consider a general purpose memory, for example. A semiconductor integrated circuit device, in which a voltage converting circuit designed to meet high speed operation by the conventional technique is mounted, consumes extra current when the system into which the device is incorporated has low operational frequency.